Recently, due to the fast development in electro-optic techniques, the related studies and techniques of plasma display panels (to be abbreviated as PDP here below) have been developed rapidly and suitable for multimedia applications. The advantages of PDP, in contrast to liquid crystal displays now in use, include better moving picture quality and image display characteristics. In addition, the thickness of a PDP is much thinner than that of a conventional cathode ray tube (CRT) television set. The PDP thus catches the eyes of scientists and researchers and have become a popular field of research. We believe that PDP will soon become popular as a home entertainment equipment to replace the traditional display devices.
In general, a high resolution of color PDP with 1028.times.1024 pixels (SXGA) requires profound techniques of manufacturing process in order to fabricate the fine-pitched barrier ribs and to produce the luminescent materials (such as phosphor) that are essential for PDP fabrication. Furthermore, a high speed driving method is required to activate the pulses and drive the high resolution picture. However, the dynamic false contour of the image appears when the conventional driving method is used in dynamic image display. In other words, when the dynamic image is moving, the abrupt changes of image brightness and the distortion of the image contour take place in some regions of the display, due to the fixed sequence of the sub-field signals in the prior art.
In the prior art, the accumulated brightness level is determined by a plurality of sub-fields which have the sustaining periods of different time duration. However, when the video image is displayed on the PDP driven by the conventional manner with fixed order of time ratio sequence, the abrupt changes of image brightness level will cause the distortion and error as so called "dynamic image false contour" effect.
In order to reduce the "dynamic image false contour" effect, one prior art is shown on the FIG. 1A and FIG. 1B. The FIG. 1A is a schematic diagram illustrating the conventional example of display cells in the prior art. FIG. 1B is a timing diagram illustrating the timing of signal sequences related to the display cells in FIG. 1A. In FIG. 1A, X's and Y's denote the cell display signals in the display matrix and also play the roles of display electrodes. X's and Y's can both be grouped into odd electrodes and even electrodes. FIG. 1B is a timing diagram illustrating the timing of signal sequences in accordance with the X's and Y's electrodes in FIG. 1A, wherein, sequence X includes a rest period, an addressing period, a sustaining period which comprises an erasing period; similarly, sequence Y also includes a reset period, an addressing period, a sustaining period which also comprises an erasing period. Afterwards, sequence Y succeeds with a sustaining period in which sequence Y differs and is complementary with sequence X. In this conventional method, however, signals X's can be even or odd, but they are all erased simultaneously during one erasing period in sequence X. This erasing method will lead to the heavy loss of wall charge accumulated in the Y cells during the single erasing period, then the Y cells can not be maintained in light emission status during the second sustaining period.